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There are two different schools of design for computer chips, Complex Instruction Sets and Reduced Instruction sets. Ask most people who know something about computer processors and they will tell you that most Intel chips are CISC, and all PowerPC chips are RISC. That's close to true, but not quite.

Complex Instruction Set Computers (CISC)

The idea with CISC type processors is that the computer chip is designed with lots of instructions to provide programmers with lots of options for doing processing. A CISC based processor (in theory) does more work in fewer instructions because it has special instructions for every possible type of processing the processor might be asked to perform.

The first programming 'language' was assembly language and at that time, assembly language programmers wanted to get as much done in as few instructions as possible because programming in assembly language required a lot of instructions and a lot of work to write even simple programs to solve basic problems. The more work that could be done inside the processor, the better the programmers liked it and the more they recommended more complicated processors when it came time to upgrade. Instructions that did more, also took more clock cycles to execute, reducing the total number of instructions per second that could be processed.

However, the cost of more instructions is greater complexity and a more expensive processor.

Reduced Instruction Set Computers (RISC)

The marketing buzz calls the PowerPC processor a RISC chip. This is not completely true, but it is more of a RISC than an CISC chip.

The idea behind RISC type processors is that they have a smaller set of instructions and the instructions themselves are simpler. Instead of trying to create an instruction for every possible process or calculation, the RISC philosophy assumes that simpler instructions that can be executed in fewer clock cycles gets more work done.

Another benefit: because there are fewer instructions, the chip is less complex, easier to manufacture and can run more instructions, faster. The theory here is that a RISC chip will do more work in less time, even if it is executing more instructions overall when compared to a CISC chip.

The Real World

There is no such thing as a pure RISC chip or a purely CISC chip. Most of the processors in personal computers, desktop systems and servers are a little bit of a mix of CISC and RISC, though they tend more towards the CISC side of the spectrum.

Intel x86 Instruction Set

• AAA - ASCII Adjust for Addition
• AAD - ASCII Adjust for Division
• AAM - ASCII Adjust for Multiplication
• AAS - ASCII Adjust for Subtraction
• ADC - Add With Carry
• ADD - Arithmetic Addition
• AND - Logical And
• ARPL - Adjusted Requested Privilege Level of Selector (286+ PM)
• BOUND - Array Index Bound Check (80188+)
• BSF - Bit Scan Forward (386+)
• BSR - Bit Scan Reverse (386+)
• BSWAP - Byte Swap (486+)
• BT - Bit Test (386+)
• BTC - Bit Test with Compliment (386+)
• BTR - Bit Test with Reset (386+)
• BTS - Bit Test and Set (386+)
• CALL - Procedure Call
• CBW - Convert Byte to Word
• CDQ - Convert Double to Quad (386+)
• CLC - Clear Carry
• CLD - Clear Direction Flag
• CLI - Clear Interrupt Flag (disable)
• CLTS - Clear Task Switched Flag (286+ privileged)
• CMC - Complement Carry Flag
• CMP - Compare
• CMPS - Compare String (Byte, Word or Doubleword)
• CMPXCHG - Compare and Exchange
• CWD - Convert Word to Doubleword
• CWDE - Convert Word to Extended Doubleword (386+)
• DAA - Decimal Adjust for Addition
• DAS - Decimal Adjust for Subtraction
• DEC - Decrement
• DIV - Divide
• ENTER - Make Stack Frame (80188+)
• ESC - Escape
• HLT - Halt CPU
• IDIV - Signed Integer Division
• IMUL - Signed Multiply
• IN - Input Byte or Word From Port
• INC - Increment
• INS - Input String from Port (80188+)
• INT - Interrupt
• INTO - Interrupt on Overflow
• INVD - Invalidate Cache (486+)
• INVLPG - Invalidate Translation Look-Aside Buffer Entry (486+)
• IRET/IRETD - Interrupt Return
• Jxx - Jump Instructions Table
• JCXZ/JECXZ - Jump if Register (E)CX is Zero
• JMP - Unconditional Jump
• LAHF - Load Register AH From Flags
• LAR - Load Access Rights (286+ protected)
• LDS - Load Pointer Using DS
• LEA - Load Effective Address
• LEAVE - Restore Stack for Procedure Exit (80188+)
• LES - Load Pointer Using ES
• LFS - Load Pointer Using FS (386+)
• LGDT - Load Global Descriptor Table (286+ privileged)
• LIDT - Load Interrupt Descriptor Table (286+ privileged)
• LGS - Load Pointer Using GS (386+)
• LLDT - Load Local Descriptor Table (286+ privileged)
• LMSW - Load Machine Status Word (286+ privileged)
• LOCK - Lock Bus
• LODS - Load String (Byte, Word or Double)
• LOOP - Decrement CX and Loop if CX Not Zero
• LOOPE/LOOPZ - Loop While Equal / Loop While Zero
• LOOPNZ/LOOPNE - Loop While Not Zero / Loop While Not Equal
• LSL - Load Segment Limit (286+ protected)
• LSS - Load Pointer Using SS (386+)
• LTR - Load Task Register (286+ privileged)
• MOV - Move Byte or Word
• MOVS - Move String (Byte or Word)
• MOVSX - Move with Sign Extend (386+)
• MOVZX - Move with Zero Extend (386+)
• MUL - Unsigned Multiply
• NEG - Two's Complement Negation
• NOP - No Operation (90h)
• NOT - One's Compliment Negation (Logical NOT)
• OR - Inclusive Logical OR
• OUT - Output Data to Port
• OUTS - Output String to Port (80188+)
• POP - Pop Word off Stack
• POPA/POPAD - Pop All Registers onto Stack (80188+)
• POPF/POPFD - Pop Flags off Stack
• PUSH - Push Word onto Stack
• PUSHA/PUSHAD - Push All Registers onto Stack (80188+)
• PUSHF/PUSHFD - Push Flags onto Stack
• RCL - Rotate Through Carry Left
• RCR - Rotate Through Carry Right
• REP - Repeat String Operation
• REPE/REPZ - Repeat Equal / Repeat Zero
• REPNE/REPNZ - Repeat Not Equal / Repeat Not Zero
• RET/RETF - Return From Procedure
• ROL - Rotate Left
• ROR - Rotate Right
• SAHF - Store AH Register into FLAGS
• SAL/SHL - Shift Arithmetic Left / Shift Logical Left
• SAR - Shift Arithmetic Right
• SBB - Subtract with Borrow/Carry
• SCAS - Scan String (Byte, Word or Doubleword)
• SETAE/SETNB - Set if Above or Equal / Set if Not Below (386+)
• SETB/SETNAE - Set if Below / Set if Not Above or Equal (386+)
• SETBE/SETNA - Set if Below or Equal / Set if Not Above (386+)
• SETE/SETZ - Set if Equal / Set if Zero (386+)
• SETNE/SETNZ - Set if Not Equal / Set if Not Zero (386+)
• SETL/SETNGE - Set if Less / Set if Not Greater or Equal (386+)
• SETGE/SETNL - Set if Greater or Equal / Set if Not Less (386+)
• SETLE/SETNG - Set if Less or Equal / Set if Not greater or Equal (386+)
• SETG/SETNLE - Set if Greater / Set if Not Less or Equal (386+)
• SETS - Set if Signed (386+)
• SETNS - Set if Not Signed (386+)
• SETC - Set if Carry (386+)
• SETNC - Set if Not Carry (386+)
• SETO - Set if Overflow (386+)
• SETNO - Set if Not Overflow (386+)
• SETP/SETPE - Set if Parity / Set if Parity Even (386+)
• SETNP/SETPO - Set if No Parity / Set if Parity Odd (386+)
• SGDT - Store Global Descriptor Table (286+ privileged)
• SIDT - Store Interrupt Descriptor Table (286+ privileged)
• SHL - Shift Logical Left
• SHR - Shift Logical Right
• SHLD/SHRD - Double Precision Shift (386+)
• SLDT - Store Local Descriptor Table (286+ privileged)
• SMSW - Store Machine Status Word (286+ privileged)
• STC - Set Carry
• STD - Set Direction Flag
• STI - Set Interrupt Flag (Enable Interrupts)
• STOS - Store String (Byte, Word or Doubleword)
• STR - Store Task Register (286+ privileged)
• SUB - Subtract
• TEST - Test For Bit Pattern
• VERR - Verify Read (286+ protected)
• VERW - Verify Write (286+ protected)
• WAIT/FWAIT - Event Wait
• WBINVD - Write-Back and Invalidate Cache (486+)
• XCHG - Exchange
• XLAT/XLATB - Translate
• XOR - Exclusive OR

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